I referred to the following URL.
http://communities.vmware.com/docs/DOC-10493
[ software info ]
ESXi
~ # vmware -l VMware ESXi 4.1.0 Update 1 |
VM is Scientific Linux6 (SL6) 32bit. I assigned 1 vCPU.
[root@sl6-1 ~]# cat /etc/redhat-release Scientific Linux release 6.0 (Carbon) [root@sl6-1 ~]# uname -r 2.6.32-131.6.1.el6.i686 |
[ procedures ]
Step1
power off VM
Step2
on vSphere client , enable CPU hot plug to that VM.
Step3
power on VM
Step4
add vCPUs
on vSphere client , VM -> edit -> Hardware -> CPU
I changed # of vCPUs from 1 to 4.
dmesg
[root@sl6-1 ~]# dmesg processor LNXCPU:03: registered as cooling_device3 SMP alternatives: switching to SMP code Booting Node 0 Processor 3 APIC 0x3 Initializing CPU#3 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 3, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. Booting Node 0 Processor 2 APIC 0x2 Initializing CPU#2 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 2, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. Booting Node 0 Processor 1 APIC 0x1 Initializing CPU#1 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 1, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. |
# of vCPU truns 4.
[root@sl6-1 ~]# cat /proc/cpuinfo | grep "model name" | wc -l 4 |
On SL6 32bit , I don’t need to do anything to activate hot-plugged vCPUs.
Just only change # of vCPUs via vSphere client.
change # of vCPUs from 4 to 8.
# of vCPU turns 8.
[root@sl6-1 ~]# cat /proc/cpuinfo | grep "model name" | wc -l 8 |
dmesg
processor LNXCPU:07: registered as cooling_device7 Booting Node 0 Processor 6 APIC 0x6 Initializing CPU#6 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 6, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. Booting Node 0 Processor 5 APIC 0x5 Initializing CPU#5 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 5, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. Booting Node 0 Processor 4 APIC 0x4 Initializing CPU#4 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 4, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. Booting Node 0 Processor 7 APIC 0x7 Initializing CPU#7 mce: CPU supports 0 MCE banks x86 PAT enabled: cpu 7, old 0x0, new 0x7010600070106 Skipped synchronization checks as TSC is reliable. |
[root@sl6-1 cpu]# pwd /sys/devices/system/cpu [root@sl6-1 cpu]# ls cpu0 cpu2 cpu4 cpu6 cpufreq kernel_max online present cpu1 cpu3 cpu5 cpu7 cpuidle offline possible [root@sl6-1 cpu]# [root@sl6-1 cpu]# cat online 0-7 |
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